Found 6 results
Author Title Type [ Year
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Analysis and Optimization of Low-Power Passive Equalizers for CPU–Memory Links,
, IEEE Transactions on Components, Packaging and Manufacturing Technology, Volume 1, Number 9, p.1406–1420, (2011)
Low power passive equalizer design for computer memory links,
, 2008 16th IEEE Symposium on High Performance Interconnects, p.51–56, (2008)
Synchronization design of a coupled phase-locked loop,
, IEEE transactions on microwave theory and techniques, Volume 51, Number 3, p.952–960, (2003)
Synchronization of Oscillating Systems for Microwave Antennas and RF Electronics,
, AIP Conference Proceedings, p.15–25, (2003)
Time delay considerations in high-frequency phase-locked loops,
, 2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium. Digest of Papers (Cat. No. 02CH37280), p.181–184, (2002)