Found 19 results
Author Title Type [ Year(Asc)]
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2021
A 50 Gbps 9.5 pJ/bit VCSEL-based Optical Link, Maharry, Aaron, Valenzuela Luis A., Andrade Hector, Kalifa Itshak, Cestier Isabelle, Galanty Matan, Atias Boaz, Sandomirsky Anna, Mentovich Elad, Coldren Larry, et al. , 2021 IEEE Photonics Conference (IPC), p.1-2, (2021)
A 50 Gbps 9.5 pJ/bit VCSEL-based Optical Link, Maharry, Aaron, Valenzuela Luis A., Andrade Hector, Kalifa Itshak, Cestier Isabelle, Galanty Matan, Atias Boaz, Sandomirsky Anna, Mentovich Elad, Coldren Larry, et al. , 2021 IEEE Photonics Conference (IPC), p.1-2, (2021)
Analog Coherent Detection for Energy Efficient Intra-Data Center Links at 200 Gbps Per Wavelength, Hirokawa, Takako, Pinna Sergio, Hosseinzadeh Navid, Maharry Aaron, Andrade Hector, Liu Junqian, Meissner Thomas, Misak Stephen, Movaghar Ghazal, Valenzuela Luis A., et al. , Journal of Lightwave Technology, Volume 39, Number 2, p.520-531, (2021)
2019
185mW InP HBT Power Amplifier with 1 Octave Bandwidth (2550GHz), 38% peak PAE at 44GHz and Chip Area of 276 x 672 ?m2, Arias, A., Rowell P., Urteaga M., Griffith Z., Shinohara K., Bergman J., Carter A., Pierson R., Brar B., Buckwalter J., et al. , 2019 IEEE MTT-S International Microwave Symposium (IMS), June, p.1303-1305, (2019)
2017
Forward bias operation of silicon photonic Mach Zehnder modulators for RF applications, Chao, Rui Lin, Shi Jin Wei, Jain Aditya, Hirokawa Takako, Khope Akhilesh S. P., Schow Clint, Bowers JE, Helkey Roger, and Buckwalter James F. , Optics express, Volume 25, Number 19, p.23181–23190, (2017)
Forward bias optimization of a silicon photonic modulator for analog application, Jain, Aditya, Chao Rui Lin, Shi Jin Wei, Schow Clint, Bowers JE, Helkey Roger, and Buckwalter James , 2017 IEEE Avionics and Vehicle Fiber-Optics and Photonics Conference (AVFOP), p.47–48, (2017)
2014
A low-power, high-speed, 9-channel germanium-silicon electro-absorption modulator array integrated with digital CMOS driver and wavelength multiplexer, Krishnamoorthy, AV, Zheng X, Feng D, Lexau J, Buckwalter JF, Thacker HD, Liu F, Luo Y, Chang E, Amberg P, et al. , Optics express, Volume 22, Number 10, p.12289–12295, (2014)
2013
Energy efficiency optimization through codesign of the transmitter and receiver in high-speed on-chip interconnects, Weng, Shih-Hung, Zhang Yulei, Buckwalter James F., and Cheng Chung-Kuan , IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 22, Number 4, p.938–942, (2013)
2012
Modeling and analysis of power distribution networks in 3-D ICs, Hu, Xiang, Du Peng, Buckwalter James F., and Cheng Chung-Kuan , IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 21, Number 2, p.354–366, (2012)
2011
Analysis and Optimization of Low-Power Passive Equalizers for CPU–Memory Links, Zhang, Ling, Yu Wenjian, Zhang Yulei, Wang Renshen, Deutsch Alina, Katopis George A., Dreps Daniel M., Buckwalter James, Kuh Ernest S., and Cheng Chung-Kuan , IEEE Transactions on Components, Packaging and Manufacturing Technology, Volume 1, Number 9, p.1406–1420, (2011)
2010
High-speed and low-power on-chip global link using continuous-time linear equalizer, Zhang, Yulei, Buckwalter James F., and Cheng Chung-Kuan , 19th Topical Meeting on Electrical Performance of Electronic Packaging and Systems, p.5–8, (2010)
Performance prediction of throughput-centric pipelined global interconnects with voltage scaling, Zhang, Yulei, Buckwalter James F., and Cheng Chung-Kuan , Proceedings of the 12th ACM/IEEE international workshop on System level interconnect prediction, p.69–76, (2010)
Prediction and comparison of high-performance on-chip global interconnection, Zhang, Yulei, Hu Xiang, Deutsch Alina, A Engin Ege, Buckwalter James F., and Cheng Chung-Kuan , IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 19, Number 7, p.1154–1166, (2010)
2009
Design methodology of high performance on-chip global interconnect using terminated transmission-line, Zhang, Yulei, Zhang Ling, Deutsch Alina, Katopis George A., Dreps Daniel M., Buckwalter James F., Kuh Ernest S., and Cheng Chung-Kuan , 2009 10th International Symposium on Quality Electronic Design, p.451–458, (2009)
On-chip global clock distribution using directional rotary traveling-wave oscillator, Zhang, Yulei, Buckwalter James F., and Cheng Chung-Kuan , 2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems, p.251–254, (2009)
Prediction of high-performance on-chip global interconnection, Zhang, Yulei, Hu Xiang, Deutsch Alina, Engin A, Buckwalter James F., and Cheng Chung-Kuan , Proceedings of the 11th international workshop on System level interconnect prediction, p.61–68, (2009)
2008
Low power passive equalizer design for computer memory links, Zhang, Ling, Yu Wenjian, Zhang Yulei, Wang Renshen, Deutsch Alina, Katopis George A., Dreps Daniel M., Buckwalter James, Kuh Ernest, and Cheng Chung-Kuan , 2008 16th IEEE Symposium on High Performance Interconnects, p.51–56, (2008)
On-chip bus signaling using passive compensation, Zhang, Yulei, Zhang Ling, Deutsch Alina, Katopis George A., Dreps Daniel M., Buckwalter James F., Kuh Ernest S., and Cheng Chung-Kuan , 2008 IEEE-EPEP Electrical Performance of Electronic Packaging, p.33–36, (2008)
What is the design challenge for on-chip speed-of-light communication?, Cheng, CK, and Buckwalter James , ACM SIGDA Newsletter, Volume 38, Number 14, p.1–1, (2008)